An Ultra Low-Power Programmable Voltage Reference for Power-Constrained Electronic Systems

This paper proposes a novel architecture for the generation of a programmable voltage reference: the background- calibrated (BC)-PVR. Our mixed-signal architecture periodically calibrates a static ultra low-power voltage reference generator, from an accurate bandgap reference. The portion of the chip used for the calibration can be powered down with a programmable duty-cycle. The system aims to fully exploit the small temperature derivative vs time DT of several application domains to minimize the average current consumption. The BC-PVR has been designed and implemented in TSMC 55-nm CMOS technology, and it achieves the largest reported programming reference output ◦range [0.42 - 2.52] V, over the temperature range [-20 , 85] C. The duty-cycle mode allows nanoampere current consumption, and the large design flexibility permits to optimize the system performance for the specific application. These features make the BC-PVR very well-suited for power-constrained electronic systems

A 6.5 nA Static Self-Calibrating Programmable Voltage Reference for Smart Socs

Abstract—This paper presents a novel architecture of a self- calibrating programmable voltage reference with nanoampere current consumption. The output voltage is generated by a programmable impedance matrix, based on MOS transistors and resistors, and periodically calibrated with a duty-cycled bandgap. In application domains where the temperature exhibits a low rate-of-change, an average current consumption of 6.5 nA is achieved, largely outperforming all the previously reported switched-capacitor or floating-gate architectures. Implemented in 55-nm CMOS technology, the reference exhibits a 0.4-to-2.5-V output voltage range, over the -20 to +80◦ C temperature range

A millimeter-scale crystal-less MICS transceiver for insertable smart pills

This paper presents a millimeter-scale crystal-less wireless transceiver for volume-constrained insertable pills. Operating in the 402-405 MHz medical implant communication service (MICS) band, the phase-tracking receiver-based over-the-air carrier recovery has a +/- 160 ppm coverage. A fully integrated adaptive antenna impedance matching solution is proposed to calibrate the antenna impedance variation inside the body. A tunable matching network (TMN) with single inductor performs impedance matching for both transmitter (TX) and receiver (RX) and TX/RX mode switching. To dynamically calibrate the antenna impedance variation over different locations and diet conditions, a loop-back power detector using self-mixing is adopted, which expands the power contour up to 4.8 VSWR. The transceiver is implemented in a 40-nm CMOS technology, occupying 2 mm(2) die area. The transceiver chip and a miniature antenna are integrated in a 3.5 x 15 mm(2) area prototype wireless module. It has a receiver sensitivity of -90 dBm at 200 kbps data rate and delivers up to - 25 dBm EIRP in the wireless measurement with a liquid phantom

An IR-UWB IEEE 802.15.4z compatible coherent asynchronous polar transmitter in 28-nm CMOS

A low-power IEEE 802.15.4z high-rate PHY (HRP) compatible coherent transmitter is described. The proposed transmitter uses a digital polar architecture with fixed amplitude steps in the power amplifier and asynchronous time-discrete pulse shaping. The pulse-shaping unit consists of a finite-impulse response (FIR) filter using current-starved inverter-based delay taps that can be calibrated on-chip. An injection-locked ring oscillator (ILRO)-based frequency synthesis enables wideband operation from 3- to 10-GHz frequency bands. The ILRO also allows for duty-cycled coherent mode operation with 2-4-ns phase locking time and binary phase modulation is applied directly on the oscillator. The on-chip digital front end enables duty cycling (DC) of analog front-end modules with a granularity of 2 ns. Implemented in 28-nm CMOS process, this chip is measured to consume 4.9-mW power in nominal mode with IEEE 802.15.4z high pulse repetition frequency (HPRF) compatible data rate of 6.81 Mb/s compliant with major spectrum mask regulations for channels 5 and 9. With DC of the oscillator enabled in the energy-efficient mode, a power consumption of 430 mu W is achieved for packets compatible with legacy pulse-position-modulated IEEE 802.15.4a standard with a data rate of 27.2 Mb/s

A Low-Power 6-to-9GHz IEEE 802.15.4a/4z Compliant IR-UWB Transceiver with Pulse Pre-Emphasis Achieving High ToA Precision

This work presents an IEEE 802.15.4a/4z compliant IR-UWB transceiver for high-precision ranging. By virtue of the proposed digital deserialization-serialization, the TX can generate the Inter-Symbol-Interference (ISI) free IEEE 802.15.4a/4z packet. The proposed analog Finite Impulse Response (FIR)-based TX pre-emphasis improves 3.5× Time of Arrival (ToA) measurement precision without substantial power overhead and fulfills the spectrum requirement of the standard and the worldwide UWB regulations. The presented transceiver consumes 8.7 mW in TX mode and 21 mW in RX mode. IEEEFALS